1. Field of the Invention
The present invention relates to exposure masks, and in particular to pattern forming methods for forming patterns corresponding to exposure masks on semiconductor wafers.
The present application claims priority on Japanese Patent Application No. 2008-28381, the content of which is incorporated herein by reference in its entirety.
2. Description of Related Art
Recent optical lithography allows exposure devices to use exposure light having short wavelengths (λ), large numerical apertures (NA) in projection lenses, and fine patterns whose resolutions are less than one-half the wavelengths of exposure light by way of a high resolution method. In general, the resolving power R of the optical lithography is defined as R=k1·λ/NA, while the numerical aperture NA is defined as NA=n·sin θ, where θ denotes a maximum incidence angle on an imaging plane, specifically, it represents the size of a projection lens for collecting light diffracted by a mask, and n denotes a refraction rate of a medium positioned between the projection lens and the wafer. Exposure devices are developed to increase the value of sin θ up to “1” and to increase NA to be greater than “1” (i.e. NA>1) by way of an immersion exposure technology for filling liquid in the space between the projection lens and the wafer. In the above, k1 denotes a coefficient dependent upon the process of resist materials, wherein it may gradually decrease due to improvements of resist materials and due to improvements of focusing precisions of exposure devices. As a result, it is possible to achieve fine resolutions due to improvements of the resolving power in the optical lithography technology.
The high resolution method is used to improve resolutions by optimizing the optical shape of an illumination source adapted to a mask, the distribution of light transmitted via the mask, or the amplitude distribution on a pupil plane. The mask is an exposure disk having a circuit pattern (referred to as a mask pattern) installed in the exposure device, wherein it may be frequently referred to as a reticle when the reduction factor thereof is less than “1”. For the sake of convenience, any type of exposure patterns adapted to exposure devices will be referred to as masks. For example, a mask pattern is formed by etching an optical-preserve film composed of chromium formed on a transparent substrate composed of quartz.
An oblique incidence illumination is known as the high resolution method for optimizing the optical shape of an illumination source, wherein “perpendicular” incidence light perpendicularly incident on a fine mask may not contribute to resolutions and is thus prevented so as to use only the oblique incidence light for illuminating the mask. The conventionally-known illumination may need to collect zero-degree plus/minus one-degree components of refraction light when resolving repetitive patterns. In contrast, the oblique illumination discards one of plus/minus one-degree components added to the zero-degree component of refraction light so as to image repetitive patterns with original pitches by way of double luminous interference using the zero-degree component and the other of plus/minus one-degree components in the refraction light.
Discarding one of plus/minus one-degree component added to the zero-degree component of the refraction light degrades the optical balance in the zero-degree component of the refraction light so as to degrade the best-focus contrast in the oblique illumination. However, the oblique illumination has one-half the incidence angle at the imaging plane compared to the conventionally-known illumination; hence, it may reduce the degradation of the defocus contrast, thus increasing a focal depth. The focal depth indicates a focal range for producing an effective resist pattern.
Due to the progression in the high numerical aperture (NA) of the exposure device, polarization has become popular instead of an illumination source for controlling optical shapes. It is known that the amplitude direction of an electric field greatly affects the magnitude of optical interference as the incidence angle of the zero-degree and first-degree components of light incident on the wafer become large. It is possible to provide another method which controls polarization of an illumination source so as to improve resolution characteristics. It is possible to improve resolution characteristics by using azimuthal polarization light. Azimuthal polarization light is caused by linear polarization whose polarization direction matches the tangential line of a concentric circle of a second-order illumination source forming a zonal illumination. In addition, it is possible to provide other methods which improve resolution characteristics by adapting a Y-polarizer to X-dipole illumination and by adapting an X-polarizer to Y-dipole illumination.
It is possible for the high resolution method to use the well-known phase shift mask, which is related to the Shibuya-Lebenson method and the halftone method. A Shibuya-Lebenson phase shift mask (referred to as a Lebenson phase shift mask) causes a 180-degree phase inversion to alternately occur between the phases of light transmitted via adjacent openings of a mask, thus forming a clear shadow due to the interference of light having inverted phases.
A halftone phase shift mask slightly leaks light in a light preventive region of a mask so that the phase of the leaked light is subjected to a 180-degree inversion compared to the phase of light transmitted via an opening of the mask. The halftone phase shift mask is frequently used because it can be easily adapted to the exposure device. In general, light preventive films of masks are composed of chrome metals, whereas halftone phase masks use semitransparent films (or halftone films) composed of metal oxides, nitride oxides (MoSiON), and metal fluorides (CrF) instead of light preventive films.
It is known that the maximum focal depth can be achieved via hole-patterns forming openings in a mask in accordance with Bessel functions in the amplitude distribution of light transmitted through the mask. Using negative amplitudes of light transmitted through the semitransparent film makes the amplitude distribution of the transmitted light of the mask approximate to Bessel functions so as to increase the focal depth. Patent Document 1 teaches an example of a halftone phase shift mask having multiple hole-patterns forming openings in a halftone film.                Patent Document 1: Japanese Unexamined Patent Application Publication No. 2003-241361        
In the case of line-and-space patterns which are one-dimensional patterns aligned one-dimensionally, it is possible to achieve almost-perfect imaging of double luminous interference by way of exposure using the Lebenson phase shift mask in the prescribed luminance condition defining a small coherent factor (σ) or using the halftone phase shift mask and the dipole illumination. Herein, σ denotes a scale factor of an illumination lens compared to the pupil plane of a light source, wherein σ is expressed by a division of “NA of illumination lens”/“NA of projection lens”.
The present inventor has recognized that even when exposure is performed using the above mask and illumination, it is very difficult to achieve perfect imaging of double luminous interference in hole-patterns and dot-patterns, which are two-dimensional patterns aligned two-dimensionally. In addition, the above technology suffers from problems that perfect imaging of double luminous interference cannot be achieved in two-dimensional patterns such as hole-patterns and dot-patterns which are two-dimensionally aligned patterns, the resolving power decreases in two-dimensional patterns, and pitches cannot be reduced. Even when exposure is performed using the oblique incidence illumination and the Lebenson phase shift mask, the resolving power should be decreased in two-dimensional patterns compared to one-dimensional patterns. As a result, fine fabrication cannot be achieved in specific processes in manufacturing devices (e.g. exposure processes). The above problems prevent the overall layout areas of chips from being further reduced in semiconductor manufacturing processes.